Whether to build a custom chip or buy one is a decision you can quantify. Divide the development cost CNRE by the per-unit cost difference and you get the break-even volume N*. Session 2, Exercise 4 asks where power cost is measured (chip, server or facility) and recounts N*. Session 4, Exercise 5 computes N* separately from other assumed values and asks which kind of organization buys that volume.
N* = CNRE / [(cG + oG) − (cA + oA)] · o = kW per unit × PUE × 8,760 × years × utilization × electricity price
① Where is power measured: chip, server, facility
Power boundary
GPU operating cost oG
ASIC operating cost oA
Denominator
Power-cost difference within the denominator
Break-even volume N*
Under the same assumptions N* stays at 3,400–3,600 units whichever boundary you count at. At the chip boundary the power-cost difference is USD 875 of a USD 27,875 denominator, only 3% (about 6% even at the server boundary). The acquisition-cost difference of USD 27,000 dominates. The common story, "companies build their own chips to save electricity," does not fit these numbers.
② Whose volume is N*?
The 3-year power cost o is entered as a value, not computed
GPU per unit cG + oG
ASIC per unit cA + oA
Denominator
Break-even volume N*
N* is only a necessary condition. The sufficient condition is that the workload is still alive two to three years later, when development ends, and only an organization that controls its own models can guarantee that. The 5,000-unit threshold is lower than one might expect: operators that are not hyperscalers but "nearly hyperscaler-sized" can consider custom silicon.
Check against the solutions ()
Values from Session 2, solution to Exercise 4 (chip boundary, 2-year lifetime, server boundary, server boundary for the GPU only) and Session 4, solution to Exercise 5, recomputed with this figure's formulas. The "Solution" column holds the values printed in the solutions; computed values are rounded to the same digits for comparison.
Item
Computed
Solution
What this calculation leaves out
One ASIC is assumed to do the work of one GPU at the same throughput, latency and quality (1:1 substitution). If ASIC throughput is r times the GPU's, the same demand needs N/r ASICs, so the ASIC unit cost cA + oA must be divided by r for a like-for-like comparison.
Power values are ceilings. The 700 W of the H100 SXM is the most heat one chip can produce, not its average draw under load, and the 10.2 kW of the DGX H100 is also a maximum.
Unit prices, electricity price, PUE and utilization are assumed values for illustration. Only the chip and server power ceilings come from vendor specifications.
There is no basis for specifying an ASIC server, so at the server boundary the ASIC is scaled up by the same ratio as the GPU (1.275/0.7 ≈ 1.82×).
The time axis. A chip takes two to three years to develop, and model architectures change faster than that. The real constraint is this time, not N*. The actual decision variable is the probability that a design decision made two years ago fits today's model structure. This figure does not put a number on it.
Bargaining power. Having your own chip gives option value in price negotiations with commercial GPU vendors. This is not put in numbers either.
cA is the value computed in Session 4, Section 5 as cost per die + packaging + test. Here you enter it directly.
Session 4 calls o the present value of lifetime operating cost (mostly power) but gives no discount rate. This figure does not discount either.
The bands in ② redraw the Session 4, Exercise 5 table entries "tens of units", "hundreds to thousands", "tens of thousands" and "hundreds of thousands" as 10–99, 100–9,999, 10,000–99,999 and 100,000–999,999 units.