Session 6, Section 6 · Exercise 1 · Session 4, Exercise 4

How much cheaper when you split, how much survives when you stack

What do you do when you need the performance of a large chip but cannot make one? Using the formulas in the text, this figure works out how many pieces to split 800 mm² of silicon into so that the systems from one wafer come out cheapest, and how far yield diverges between stacking whole wafers and stacking only good dies.

① Total cost by number of splits

A_n = 8 × [1 + o(n−1)] / n cm²　·　GDPW(A) = (πd²/4)/A − πd/√(2A)　·　cost = W ÷ [GDPW · e^−A_nD₀ ÷ n × aⁿ⁻¹]

Assumption

Defect density D₀ [/cm²]

Number of splits n

Current D₀ Other D₀ in the solution (same assumption)

Chiplet area (n = )
Cost per system
Saving vs. single die
Saving = ceiling on added cost
Single die (n = 1) vs. 4 chiplets (n = 4)
Best of n = 1·2·4·8
Best over all n = 1–16

n	Chiplet area	GDPW	Yield	Good dies	Systems/wafer	Assembly yield	Effective	Cost [W]

Cost is the silicon cost of one system, written as a multiple of W, the price of one wafer. The more defects there are, the more it pays to split finely. Split without limit, though, and interface overhead and assembly yield loss eat up the yield gain. The Session 4, Exercise 4 assumption adds 10% area to each chiplet and multiplies by an assembly yield of 0.95. The saving is then read as a ceiling that the added interposer and assembly cost must not exceed.

② Wafer-to-wafer stacking (W2W) and die-to-wafer stacking (D2W)

Y_W2W = yⁿ × y_bondⁿ⁻¹　·　Y_D2W ≈ y_bondⁿ⁻¹ (with perfect screening)　·　ratio = D2W ÷ W2W

Die yield y

Yield of one bonding step y_bond

Stack height n

W2W yield (n = )
D2W yield
D2W ÷ W2W
Inputs

D2W y_bondⁿ⁻¹ W2W yⁿy_bondⁿ⁻¹ Large dots = n = 2·8·12·16 from the table in the text; numbers below = D2W ÷ W2W at that n

W2W bonds two wafers in one step, which is productive, but it cannot pick the good dies. A defective die on the upper wafer lands right on top of a good die on the lower wafer. D2W cuts and tests the dies first and bonds only known good dies (KGD). With two layers the gap is around 20%; as layers are added it grows several times over.

Check against the solution tables ()

Values from the two tables and the paragraph below them in Session 6, solution to Exercise 1, from Session 4, solution to Exercise 4, and from the table in Session 6, Section 6, recomputed with this figure's formulas. Solution values are rounded, so computed values are rounded to the digits the solution shows before comparing.
Item	Computed	Solution

What this calculation leaves out

The amount of added interposer and assembly cost is not included. The solution gives no figure either and reads the saving as a ceiling that cost must not exceed (Session 4, Exercise 4). With few defects, as at D₀ = 0.05, adding that cost can reverse the result.
The price of the die-to-die interface circuitry (PHY) enters only as area overhead. Session 6, Section 2 of the text notes that the PHY also consumes power, and that communication across dies is slower and more expensive than on-die communication.
The curve is flat near the optimum. At D₀ = 0.1, n = 4–6 all fall within 2% of the optimum.
Yield follows the Poisson model e^−AD₀. When defects cluster, actual yield is higher than the Poisson prediction (Session 4, Section 5 and Exercise 3).
The GDPW approximation gives 1–5% fewer dies than a direct count for 100–800 mm² dies (Session 4, Section 5).
The D2W formula is an approximation that assumes perfect screening. In D2W, too, the value of the discarded bad dies stays on as cost. The yield loss does not disappear; it moves to before stacking.
y = 0.9 and y_bond = 0.995 are assumed values from the text. The bonding yield is the same value as the example in Session 3, Section 5.